A3PN060-VQG100I 100-VQFP (14×14) kaapuni hoʻohuihui IC FPGA 71 I/O 100VQFP hoʻokahi kūʻai.
Huahana Huahana
ANO | HOIKE |
Māhele | Nā Kaapuni Hoʻohui (IC) Hoʻokomo ʻia Nā FPGA (Field Programmable Gate Array) |
ʻO Mfr | ʻenehana Microchip |
moʻo | ProASIC3 nano |
Pūʻolo | pā |
Pūʻolo maʻamau | 90 |
Kūlana Huahana | ʻeleu |
Huina RAM Bits | 18432 |
Ka helu o I/O | 71 |
Ka helu o na puka | 60000 |
Voltage - Hoʻolako | 1.425V ~ 1.575V |
ʻAno kau ʻana | Mauna ʻili |
Ka Mahana Hana | -40°C ~ 100°C (TJ) |
Pūʻolo / hihia | 100-TQFP |
Pūʻolo Mea Mea Hoʻolako | 100-VQFP (14×14) |
Helu Huahana Kumu | A3PN060 |
Microsemi
ʻO Microsemi Corporation, i hoʻokumu ʻia ma Irvine, Kaleponi, he mea hoʻolālā alakaʻi, mea hana, a me ka mea kūʻai aku o nā analog kiʻekiʻe a me ka hui pū ʻana o nā hōʻailona hoʻohui a me nā semiconductor hilinaʻi kiʻekiʻe e hoʻokele a hoʻokele a hoʻoponopono paha i nā lako mana, pale i nā spike voltage transient a hoʻouna. , loaʻa a hoʻonui i nā hōʻailona.
Loaʻa nā huahana Microsemi i nā ʻāpana kūʻokoʻa a me nā hoʻonā kaapuni i hoʻohui ʻia e hoʻomaikaʻi i nā hoʻolālā o nā mea kūʻai aku ma o ka hoʻomaikaʻi ʻana i ka hana a me ka hilinaʻi, ka hoʻonui ʻana i nā pākaukau, hoʻemi i ka nui, a me ka pale ʻana i nā kaapuni.nā noi.
Hoʻomaka i nā FPGA ma Microsemi
Ua loaʻa iā Microsemi iā Actel i ka makahiki 2010, e hana ana i nā FPGA o Microsemi i ʻekolu mau makahiki.Ua hoʻohana maikaʻi ʻia nā FPGA o Actel ma mua o 300 mau papahana ākea i nā makahiki he ʻumi i hala aku nei, e hōʻoiaʻiʻo ana he hilinaʻi pono ʻole nā FPGA o Actel.
ʻO nā mea anti-fuse ka mea nui no ka mākeke koa a ʻaʻole i wehe ʻia i ka mākeke kīwila, no laila ua pohihihi mau ka manaʻo o Actel a hiki i ka makahiki 2002 i ka wā i hoʻolauna ʻia ai kāna mau FPGA i hoʻokumu ʻia Flash, e wehe ana i ka mea pohihihi o Actel, ka mea i hana mālie. kona ala i ka mākeke kīwila a ʻike ʻia e nā mea a pau.ʻO ProASIC ka hale kiʻi Flash mua loa, nona nā hiʻohiʻona hoʻokahi-chip e like me CPLD a me ka hoʻohana haʻahaʻa haʻahaʻa a me nā hiʻohiʻona kiʻekiʻe ma mua o nā CPLD i lanakila i ka mahalo o nā ʻenekini hoʻomohala, a ʻoi aku ka nui o nā poʻe i hoʻohana i nā FPGA architecture Flash e pani i nā CPLD mua a Nā FPGA SRAM.
Ke hoʻomau nei ka hoʻololi ʻana o nā pono o ke kaiāulu, hoʻomaikaʻi mau ʻo Actel i kāna ʻenehana FPGA, hoʻomaʻemaʻe mau a hoʻonui i nā hana a me nā kumuwaiwai kūloko o nā FPGA, a i ka makahiki 2005 ua hoʻokuʻu ʻo Actel i ke kolu o ka hanauna o Flash architecture FPGAs - ka ProASIC3/E.ʻO ka holomua o ka ProASIC3/E i hōʻike i kahi nalu hou o ka hoʻomohala ʻana.ʻO ka holomua o ka ProASIC3/E i hōʻike i kahi "kaua" hou ma waena o nā FPGA.Ua hoʻolālā ʻia ka ʻohana ProASIC3/E no ka pane ʻana i ka koi mākeke ikaika no nā FPGA piha piha, haʻahaʻa haʻahaʻa no ka mea kūʻai aku, kaʻa, a me nā noi ʻē aʻe.Eia nā huahana a Actel.
Fusion: ka FPGA mua o ka ʻoihana me ka hana analog, e hoʻohui ana i ka 12-bit AD, Flash Memory, RTC, a me nā mea ʻē aʻe e hoʻokō ai i ka SoC.
IGLOO: kahi FPGA mana haʻahaʻa haʻahaʻa loa me kahi ʻano Flash * Freeze moe moe, kahi e hoʻohana ʻia ai ka mana haʻahaʻa a hiki i 5µW a mālama ʻia ke kūlana o RAM a me nā papa inoa.
IGLOO2: i hoʻopaʻa ʻia i ka I/O ma muli o IGLOO, e hāʻawi ana i kahi helu maikaʻi loa o nā awa I/O, kākoʻo no nā mea hoʻokomo Smitter trigger, hot-plugging, a me nā hiʻohiʻona ʻē aʻe.
ProASIC3L: nā hiʻohiʻona ʻaʻole wale i ka hana kiʻekiʻe o ProASIC3 akā haʻahaʻa pū kekahi.
Nano: ʻO ka FPGA ka mana haʻahaʻa loa o ka ʻoihana, me ka liʻiliʻi o ka mana static o 2µW, e hōʻike ana i kahi pūʻolo 3mm*3mm liʻiliʻi a me ke kumu kūʻai hoʻomaka haʻahaʻa loa o US $0.46.
ʻO kēia mau pūʻulu nā ʻāpana āpau o kā Actel's kolu o ka hanauna Flash architecture FPGAs, nona nā hiʻohiʻona like ʻole e hiki ke hoʻokō i nā pono o nā mākeke like ʻole a lawe mai i nā mea hoʻohana i kahi ākea o nā koho a me nā hopena i manaʻo ʻole ʻia e hoʻonui i ka hoʻokūkū o kā lākou huahana.E nānā kākou i nā hiʻohiʻona hoihoi o kā Actel kolu o ka hoʻolālā Flash architecture FPGA.
ʻOhana FPGA Polarfire
ʻO Microsemi's PolarFire FPGAs he ʻelima mau hanauna non-volatile FPGA mea e hōʻike ana i ka ʻenehana hou 28nm non-volatile process, medium density, a haʻahaʻa haʻahaʻa hoʻohana mana, hoʻohui i ka mana haʻahaʻa haʻahaʻa FPGA architecture, haʻahaʻa haʻahaʻa haʻahaʻa 12.7Gbps transceiver, kūkulu ʻia i ka mana haʻahaʻa pālua PCI Express ʻO Gen2 (EP/RP) a me nā polokalamu palekana ʻikepili koho a me kahi mea hoʻopili hoʻopili haʻahaʻa haʻahaʻa.A hiki i ka 481K logic cell, nā voli hana o 1.0V-1.05V, a me nā mahana hana o ke kālepa (0 ° C - 100 ° C) a me ka ʻoihana (-40 ° C - 100 ° C), ākea ka laina huahana FPGA o Microsemi, a ʻo ka hoʻomaka ʻana o PolarFire e hoʻonui i kāna mākeke kūpono no nā FPGA i ka $2.5 biliona mākeke mīkini paʻa.
No ke aha e hoʻohana ai i nā Microsemi FPGA
1 Palekana kiʻekiʻe
Hōʻike ʻia ka palekana o Actel Flash architecture FPGAs i 3 mau papa o ka pale.
ʻO ka papa mua no ka papa kino o ka pale, nā transistors o ke kolu o ka hanauna Flash architecture FPGAs e pale ʻia e 7 mau ʻāpana metala, ʻo ka wehe ʻana o ka papa metala he paʻakikī loa e hoʻokō i ka ʻenekinia hoʻohuli (ma kekahi mau ala e wehe ai i kahi metala. papa e ʻike i ke kūlana hoʻololi o nā transistors kūloko a pēlā e hana hou ai i ka hoʻolālā);Flash FPGAs he non-volatile, ʻaʻole koi ʻia ka chip hoʻonohonoho waho, hoʻokahi chip, Hiki ke hoʻoikaika ʻia a holo me ka makaʻu ʻole i ka interception o ke kahawai ʻikepili i ka wā o ka hoʻonohonoho hoʻonohonoho.
ʻO ka papa ʻelua ʻo ia ka ʻenehana hoʻopunipuni Flash Lock, e like me ka inoa e hōʻike nei he hopena paʻa i nā pūnaewele Flash.He 128-bit encryption algorithm e pale ai i nā hana ʻae ʻole ma ka chip ma ka hoʻoiho ʻana i ke kī i ka chip no ka hoʻopili ʻana, a me ke kī ʻole, ʻaʻole hiki ke hoʻolālā ʻia ka chip, holoi ʻia, hōʻoia ʻia, a me nā mea ʻē aʻe. ʻenehana, ʻo ia kahi algorithm encryption 128-bit e pale ai i nā hana ʻae ʻole ma ka chip ma ka hoʻoiho ʻana i ke kī i ka chip no ka hoʻopili ʻana.
ʻO ka papa ʻekolu he ʻenehana e hoʻopili ai i nā faila hoʻonohonoho me ka hoʻohana ʻana i ka algorithm encryption AES maʻamau maʻamau, kahi algorithm encryption e pili ana i ka palapala US Federal Information Processing Standards (FIPS) palapala 192, i hoʻohana ʻia e nā keʻena aupuni o US e pale i ka ʻike koʻikoʻi a me ka lehulehu.Hiki i ka algorithm ke loaʻa ma kahi o 3.4 x 1038 128-bit kī, ke hoʻohālikelike ʻia me ka nui kī 56-bit i ka maʻamau DES mua, e hāʻawi ana ma kahi o 7.2 x 1016 mau kī.Ma 2000, ua hoʻohana ka National Institute of Standards and Technology (NIST) i ka maʻamau AES e pani i ka maʻamau 1977 DES, e hoʻomaikaʻi nui ana i ka hilinaʻi o ka hoʻopili.Hōʻike ʻo NIST i ka palekana o ka manaʻo i hāʻawi ʻia e AES ma ka hōʻike ʻana inā hiki i kahi ʻōnaehana computing ke haki i kahi kī DES 56-bit i hoʻokahi kekona, hiki ke lawe ma kahi o 149 trillion mau makahiki e haki ai i kahi kī AES 128-bit, ʻoiai ua kākau ʻia ke ao holoʻokoʻa. ma lalo o 20 biliona makahiki, no laila hiki iā ʻoe ke noʻonoʻo i ka hilinaʻi o ka palekana.
ʻO Actel Flash FPGAs, e pili ana i ka pale ʻekolu i luna, e ʻae i ka IP waiwai o ka mea hoʻohana e hoʻomalu maikaʻi ʻia a hana pū kekahi ISP mamao, e hāʻawi i ka palekana hilinaʻi loa no nā hoʻolālā logic programmable.
2 Kiʻekiʻe hilinaʻi
ʻElua ʻano hewa i hiki ʻole ke pale ʻia i nā transistors e pili ana i ka SRAM: Soft Error a me Firm Error, ka mea i hoʻokumu ʻia e nā mea ikaika kiʻekiʻe (neutrons, particles) i ka lewa e hoʻokuʻi ana i nā transistors SRAM, a ma muli o ko lākou ʻike ikehu kiʻekiʻe, hiki ke loli. ke kūlana o ka transistor i ka wā o ka hui ʻana me kekahi transistor.
ʻO ka hapa palupalu i kapa ʻia ʻo ia ka hapa nui no ka hoʻomanaʻo SRAM, e laʻa me SRAM, DRAM, a me nā mea ʻē aʻe. I ka wā e paʻi ai kahi mea ikaika kiʻekiʻe i ka hoʻomanaʻo ʻikepili o SRAM, e hoʻohuli ʻia ka mokuʻāina ʻikepili, mai 0 a 1 a i 1 paha, e hopena i he hewa ʻikepili manawa, e nalowale ana ke kākau hou ʻia ka ʻikepili.ʻO kēia nā hewa hiki ke hoʻihoʻi ʻia a hiki ke hoʻemi ʻia e ka FPGA i kūkulu ʻia i ka ʻike hewa a me ka hoʻoponopono ʻana (EDAC) circuitry.
ʻO kahi hewa paʻa paʻa i ka wā e hoʻokau ʻia ai ka SRAM FPGA hoʻonohonoho kelepona a i ʻole ka hoʻonohonoho ʻana o ka cabling e nā ʻāpana ikaika i ka lewa, e hopena i ka hoʻololi ʻana i ka hana logic a i ʻole ka hewa uea e hopena ai i ka pau ʻole o ka ʻōnaehana a hoʻomau a hiki i ka nānā ʻana a hoʻoponopono ʻia.
ʻAʻole ʻae ʻia ka hana ʻana o Actel Flash i nā hewa firmware ma muli o kāna ʻenehana Flash kūʻokoʻa, kahi e koi ai i ka volta kiʻekiʻe e hoʻololi i ke kūlana o kahi transistor i ke kaʻina Flash, kahi koi ʻaʻole hiki ke hoʻokō ʻia e nā ʻāpana ikaika maʻamau, no laila ua aneane ʻole ka hoʻoweliweli. -loaa.
3 Haʻahaʻa mana hoʻohana
ʻEhā mau ʻano o ka hoʻohana ʻana i ka mana i nā FPGA: mana mana, mana hoʻonohonoho, mana static, a me ka mana ikaika.ʻO ka maʻamau, loaʻa i nā FPGA nā ʻano ʻehā o ka hoʻohana ʻana i ka mana, ʻoiai ʻo Actel Flash FPGA he mana static wale nō a me ka mana ikaika, ʻaʻohe mana mana a i ʻole ka mana hoʻonohonoho, no ka mea ʻaʻole pono ka mana-up i kahi manawa hoʻomaka nui, a me ka mana-iho. ʻaʻole hiki ke hoʻololi a ʻaʻole koi i kahi kaʻina hoʻonohonoho.
Hoʻokumu ʻia nā FPGA Flash-based me ʻelua mau transistors no kēlā me kēia hoʻololi programmable, aʻo nā FPGA e pili ana i ka SRAM he ʻeono mau transistors no ka hoʻololi programmable, no laila ma ke ʻano o ka nānā ʻana i ka mana hoʻololi, ʻoi aku ka liʻiliʻi o ka mana ma mua o SRAM FPGA.
Kākoʻo ka hui Fusion i ke ʻano hoʻohana haʻahaʻa haʻahaʻa kahi e hiki ai i ka chip ke hāʻawi i ka volta 1.5 V no ke kumu a hiki ke hoʻoheheʻe ʻia i lalo a ala aʻe ma o ka RTC kūloko a me ka loiloi o ka FPGA e hoʻokō i ka hoʻohana haʻahaʻa haʻahaʻa;ka Actel IGLOO a me IGLOO+ pūʻulu o FPGAs ua hoʻolālā ʻia no nā noi paʻa lima me kāna ʻano Flash * Freeze mode hiki ke hōʻemi i ka hoʻohana ʻana i ka mana static a hiki i ka 5uW a mālama i ka ʻikepili mai RAM.
ʻO ka Actel Flash FPGA e hoʻopau i ka mana liʻiliʻi ma mua o ka hoʻokūkū, ma ka statically a me ka dynamically, a hiki ke hoʻohana ʻia i nā noi i pili i ka mana a koi aku i ka hoʻohana haʻahaʻa haʻahaʻa, e laʻa i nā PDA, nā ʻoliʻoli pāʻani, etc.