(Nā Mea Uila) 5V927PGGI8

Huahana Huahana

Palapala & Media

Kaiapuni & Export Classification

Nā Punawai Hou

Nā kikoʻī huahana
24-BIT DIGITAL SIGNAL PROCESSOR

Kākoʻo ʻo Motorola DSP56307, he lālā o ka ʻohana DSP56300 o nā polokalamu hōʻailona kikohoʻe polokalamu (DSPs), i nā noi ʻenehana uila me nā hana kānana maʻamau.ʻO ka mea hoʻoheheʻe kānana i hoʻonui ʻia ma luna o ka chip (EFCOP) kaʻina hana i nā algorithm kānana e like me ka hana koʻikoʻi, pēlā e hoʻonui ai i ka hana a me ka pono o ka DSP.E like me nā lālā ʻohana ʻē aʻe, hoʻohana ka DSP56307 i kahi mīkini hana kiʻekiʻe, hoʻokahi-clock-cycle-per-instruction engine (code-compatible me Motorolas kaulana DSP56000 ʻohana kumu), he barrel shifter, 24-bit addressing, kahi huna kuhikuhi, a he mea hoʻoponopono hoʻomanaʻo pololei, e like me ke kiʻi 1. Hāʻawi ka DSP56307 i ka hana ma 100 miliona mau kuhikuhi (MIPS) i kēlā me kēia kekona me ka hoʻohana ʻana i ka uaki 100 MHz kūloko me ka 2.5 volt core a me ka mana hoʻokomo / puka puka kūʻokoʻa 3.3 volt.

Nānā nui
Me ka hoʻohana ʻana i ka lua o ka hanauna ASMBL (Advanced Silicon Modular Block) i hoʻokumu ʻia i ke kolamu, ʻo ka XC5VLX330T-3FFG1738I he ʻelima mau kahua kūʻokoʻa (sub-families), ka koho nui loa i hāʻawi ʻia e kekahi ʻohana FPGA.Loaʻa i kēlā me kēia paepae kahi ratio like ʻole o nā hiʻohiʻona e hoʻokō i nā pono o nā ʻano hoʻolālā loiloi holomua.Ma waho aʻe o ka lole loiloi kiʻekiʻe loa, XC5VLX330T-3FFG1738I FPGAs he nui nā poloka pae ʻōnaehana IP paʻakikī, e komo pū ana me 36-Kbit block RAM/FIFOs, ka lua o ka hanauna 25 x 18 DSP slices, E koho i ka ʻenehana IO me ka kūkulu ʻia- i ka impedance i hoʻopaʻa ʻia me ka kikohoʻe, Chip Sync source-synchronous interface blocks, system monitor functionality,

HIʻona
ʻO DSP56300 Core kiʻekiʻe
● 100 miliona kuhikuhi no kekona (MIPS) me ka 100 MHz uaki ma 2.5 V kumu a me 3.3 VI/O
● Mea paʻa paʻa me ka DSP56000 core
● Hoʻonohonoho aʻo like ʻole
● Huina helu helu helu (ALU)
- Hoʻopili piha ʻia 24 x 24-bit parallel multiplier-accumulator
- 56-bit parallel barrel shifter (wikiwiki hoʻololi a me ka normalization; bit stream generation and parsing)
- Nā kuhikuhi ALU kūlana
- Kākoʻo helu 24-bit a i ʻole 16-bit ma lalo o ka mana lako polokalamu
● Pūnaehana mana polokalamu (PCU)
- Kākoʻo kūlana kūʻokoʻa code (PIC).
- Hoʻonohonoho ʻia nā ʻano hoʻoponopono no nā noi DSP (me nā offsets koke)
- Ma ka-chip aʻo huna huna
- Ma luna o ka puʻu puʻupuʻu hoʻomanaʻo-hoʻonui ʻia nā lako lako
- Nā puka lou paʻa paʻa DO
- Hoʻihoʻi kaʻa wikiwiki wikiwiki
● Loaʻa pololei i ka hoʻomanaʻo (DMA)
- ʻEono mau ala DMA e kākoʻo ana i nā komo i loko a me waho
- Hoʻokahi-, ʻelua-, a me ʻekolu-dimensional hoʻololi (me ka hoʻopaʻa pōʻai puni)
- Hoʻopau-o-block-hoʻololi hoʻopau
- Hoʻomaka mai nā laina interrupt a me nā peripheral āpau
● Loko paʻa ʻia (PLL)
- Hāʻawi i ka hoʻololi ʻana i ka helu haʻahaʻa haʻahaʻa haʻahaʻa (DF) me ka nalowale ʻole o ka laka
- Uaki puka me ka hoopau skew
● Kākoʻo debugging hardware
- Ma luna o ka Chip Emulation (Ma CE) module
- Hui hana ho'āʻo hui (JTAG) puka hōʻike hōʻike (TAP)
- Hōʻike ka mode trace address i ke komo ʻana o Program RAM i loko o ke awa waho