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TPD4S014DSQR Nā Mea Uila Pono INA146UA Hana Ki'eki'e

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Huahana Huahana

Huahana Huahana

Huahana Huahana

ANO HOIKE
Māhele Nā Kaapuni Hoʻohui (IC)Hoʻokomo ʻia

Nā CPLD (Nā Mea Hana Loko Paʻapili Paʻakikī)

ʻO Mfr Intel
moʻo MAX® V
Pūʻolo
Kūlana Huahana ʻeleu
ʻAno polokalamu Ma System Programmable
Manawa hoʻopaneʻe tpd(1) Max 7.5 ns
Hoʻolako Voltage – Loko 1.71V ~ 1.89V
Ka helu o nā ʻElemu Logic/Blocks 160
Ka helu o nā Macrocells 128
Ka helu o I/O 54
Ka Mahana Hana -40°C ~ 100°C (TJ)
ʻAno kau ʻana Mauna ʻili
Pūʻolo / hihia 64-TQFP Papa Hōʻike
Pūʻolo Mea Mea Hoʻolako 64-EQFP (7×7)
Helu Huahana Kumu 5M160Z

Palapala & Media

ANO WAIWAI LINK
Nā Modula Hoʻonaʻauao Huahana Hōʻikeʻike Max V
Huahana Hōʻikeʻike MAX® V CPLDs
PCN Hoʻolālā/Specification Quartus SW/Web Chgs 23/Sep/2021Pūnaehana Mult Dev Chgs 3/Iun/2021
PCN Packaging Mult Dev Label Chgs 24/Feb/2020Mult Dev Label CHG 24/Ian/2020
Pepa ʻikepili HTML MAX V BukePepa ʻikepili MAX V

Kaiapuni & Export Classification

HOOLAHA HOIKE
Kūlana RoHS Hoʻokō RoHS
ʻO ke kiʻekiʻe o ka naʻau (MSL) 3 (168 hola)
Kūlana REACH REACH ʻAʻole pili
ECCN 3A991D
HTSUS 8542.39.0001

MAX™ CPLD Series

Hāʻawi ʻo Altera MAX™ complex programmable logic device (CPLD) Series iā ʻoe i ka mana haʻahaʻa haʻahaʻa, nā CPLD kumu kūʻai haʻahaʻa.ʻO ka ʻohana MAX V CPLD, ka ʻohana hou loa i ka moʻo CPLD, hāʻawi i ka waiwai maikaʻi loa o ka mākeke.E hōʻike ana i kahi hoʻolālā kūʻokoʻa, ʻaʻole hoʻololi a me kekahi o nā CPLD density nui loa o ka ʻoihana, hāʻawi nā mea hana MAX V i nā hiʻohiʻona hou i ka mana haʻahaʻa haʻahaʻa i hoʻohālikelike ʻia me nā CPLD hoʻokūkū.ʻO ka ʻohana MAX II CPLD, i hoʻokumu ʻia ma ka hoʻolālā ʻāina hoʻokahi, hāʻawi i ka mana haʻahaʻa a me ke kumu kūʻai haʻahaʻa no ka pine I/O.ʻO MAX II CPLDs he mau mea hikiwawe, ʻaʻole hiki ke hoʻololi i ka manaʻo nui, ka loiloi haʻahaʻa haʻahaʻa a me nā noi lawe lima, e like me ka hoʻolālā lima kelepona.Hāʻawi nā Zero Power MAX IIZ CPLDs i nā pono like ʻole i loaʻa i ka ʻohana MAX II CPLD a pili i nā ʻano hana like ʻole.Hana ʻia ma kahi kaʻina hana CMOS 0.30-µm kiʻekiʻe, hāʻawi ka ʻohana MAX 3000A CPLD i hoʻokumu ʻia ma EEPROM i ka hiki koke a hāʻawi i nā density mai 32 a 512 macrocells.

MAX® V CPLDs

Hāʻawi nā Altera MAX® V CPLDs i ka waiwai maikaʻi loa o ka ʻoihana ma nā kumu kūʻai haʻahaʻa, nā CPLD mana haʻahaʻa, e hāʻawi ana i nā hiʻohiʻona ikaika a hiki i ka 50% haʻahaʻa haʻahaʻa holoʻokoʻa ke hoʻohālikelike ʻia me nā CPLD hoʻokūkū.Hōʻike pū ʻia ʻo Altera MAX V i kahi hoʻolālā kūʻokoʻa, non-volatile a me kekahi o nā CPLD density nui loa o ka ʻoihana.Eia kekahi, hoʻohui ka MAX V i nā hana he nui i waho ma mua, e like me ka flash, RAM, oscillators, a me nā puka lou i hoʻopaʻa ʻia, a i nā manawa he nui, hāʻawi ʻo ia i nā I/Os a me nā loiloi i kēlā me kēia wāwae ma ke kumukūʻai like me nā CPLD hoʻokūkū. .Hoʻohana ka MAX V i ka ʻenehana hōʻailona ʻōmaʻomaʻo, me nā pūʻolo liʻiliʻi e like me 20 mm2.Kākoʻo ʻia ʻo MAX V CPLD e Quartus II® Software v.10.1, ka mea e hiki ai i ka hoʻonui ʻana i ka huahana e hopena i ka hoʻohālikelike wikiwiki, ka lawe ʻana mai o ka papa wikiwiki, a me ka pani ʻana i ka manawa wikiwiki.

He aha ka CPLD (Complex Programmable Logic Device) 

ʻO ka ʻenehana ʻike, ka pūnaewele, a me nā ʻāpana uila ke kumu o ke au kamepiula hou.ʻAneʻane pau nā ʻenehana hou i nā mea uila, mai ka pūnaewele a me ke kamaʻilio kelepona i nā kamepiula a me nā kikowaena.He kahua nui ka Electronics mehe nui na lala lala.E aʻo aku kēia ʻatikala iā ʻoe e pili ana i kahi mea uila uila koʻikoʻi i kapa ʻia ʻo CPLD (Complex Programmable Logic Device).

Hoʻomaka ʻana o ka Electronic Electronics

Mea uilahe kahua paʻakikī me nā kaukani uila a me nā ʻāpana e noho nei.Eia naʻe, ma ka ʻōlelo ākea, aia nā mea uila i ʻelua mau ʻāpana nui:analog a kikohoʻe.

I nā lā mua o ka ʻenehana uila, ua like nā kaapuni, e like me ke kani, ke kukui, ka uila, a me ke au.Eia naʻe, ua ʻike koke nā mea ʻenekini uila he paʻakikī loa ka hoʻolālā ʻana a me ke kumukūʻai o nā kaapuni analog.ʻO ke koi no ka hana wikiwiki a me nā manawa huli wikiwiki i alakaʻi i ka hoʻomohala ʻana i nā uila uila.I kēia mau lā, ʻaneʻane hoʻokomo ʻia nā IC digital a me nā kaʻina hana.I ka honua o ka uila, ua hoʻololi piha nā ʻōnaehana kikohoʻe i nā uila analog ma muli o ko lākou kumukūʻai haʻahaʻa, haʻahaʻa haʻahaʻa, ʻoi aku ka maikaʻi.hōʻailona kūpaʻa, hana ʻoi aku ka maikaʻi, a me ka paʻakikī haʻahaʻa.

ʻAʻole like me ka helu palena ʻole o nā pae ʻikepili i loko o kahi hōʻailona analog, ʻo ka hōʻailona kikohoʻe he ʻelua wale nō pae loiloi (1s a me 0s).

Nā ʻano o nā lako uila uila

He mea maʻalahi nā mea uila kikohoʻe mua a loaʻa wale i kahi lima o nā puka logic.Eia nō naʻe, ma ka lōʻihi o ka manawa, ua piʻi aʻe ka paʻakikī o nā kaapuni kikohoʻe, no laila, ua lilo ka programmability i mea koʻikoʻi o nā mea mana kikohoʻe hou.Ua puka mai ʻelua papa ʻokoʻa o nā mea kikohoʻe e hāʻawi i ka programmability.ʻO ka papa mua he hoʻolālā lako paʻa me ka polokalamu reprogrammable.ʻO nā hiʻohiʻona o ia mau mea hana nā microcontrollers a me nā microprocessors.ʻO ka papa ʻelua o nā mea kikohoʻe i hōʻike ʻia i ka lako hoʻonohonoho hou e hoʻokō ai i ka hoʻolālā kaapuni logic maʻalahi.ʻO nā hiʻohiʻona o ia mau mea me nā FPGA, SPLD, a me nā CPLD.

Hiki i kahi puʻupuʻu microcontroller ke kaʻapuni loiloi kikohoʻe paʻa ʻaʻole hiki ke hoʻololi ʻia.Eia nō naʻe, loaʻa ka programmability ma ka hoʻololi ʻana i ka polokalamu / firmware e holo ana ma ka chip microcontroller.ʻO ka mea ʻē aʻe, aia kahi PLD (programmable logic device) i nā cell logic lehulehu nona nā pilina hiki ke hoʻonohonoho ʻia me ka hoʻohana ʻana i kahi HDL (ʻōlelo wehewehe hardware).No laila, hiki ke ʻike ʻia nā kaʻapuni loiloi he nui me ka PLD.Ma muli o kēia, ʻoi aku ka maikaʻi o ka hana a me ka wikiwiki o nā PLD ma mua o nā microcontrollers a me nā microprocessors.Hāʻawi pū nā PLD i nā mea hoʻolālā kaapuni me kahi kiʻekiʻe o ke kūʻokoʻa a me ka maʻalahi.

ʻO nā kaapuni i hoʻohui ʻia i manaʻo ʻia no ka mana kikohoʻe a me ka hoʻoili ʻana i nā hōʻailona maʻamau i loko o ka processor, logic circuit, a me ka hoʻomanaʻo.Hiki ke hoʻokō ʻia kēlā me kēia modula me ka hoʻohana ʻana i nā ʻenehana like ʻole.

Hoʻolauna iā CPLD

E like me ka mea i kūkākūkā mua ʻia, aia nā ʻano like ʻole o PLD (programmable logic device), e like me FPGA, CPLD, a me SPLD.ʻO ka ʻokoʻa mua ma waena o kēia mau hāmeʻa aia i ka paʻakikī kaapuni a me ka helu o nā cell logic i loaʻa.ʻO kahi SPLD maʻamau he mau haneli mau ʻīpuka, aʻo kahi CPLD he mau tausani mau puka logic.

Ma ke ʻano o ka paʻakikī, aia ka CPLD (complex programmable logic device) ma waena o SPLD (maʻalahi programmable logic device) a me FPGA a no laila, hoʻoili ʻia nā hiʻohiʻona mai kēia mau mea ʻelua.ʻOi aku ka paʻakikī o nā CPLD ma mua o nā SPLD akā ʻoi aku ka paʻakikī ma mua o nā FPGA.

ʻO nā SPLD i hoʻohana nui ʻia he PAL (programmable array logic), PLA (programmable logic array), a me GAL (generic array logic).Aia ka PLA i hoʻokahi mokulele AND a me hoʻokahi mokulele OR.Hōʻike ka papahana wehewehe ʻenehana i ka pilina o kēia mau mokulele.

Ua like like ka PAL me PLA, akā, hoʻokahi wale nō mokulele programmable ma kahi o ʻelua (AND plane).Ma ka hoʻoponopono ʻana i hoʻokahi mokulele, hoʻemi ʻia ka paʻakikī paʻakikī.Eia naʻe, loaʻa kēia pōmaikaʻi ma ke kumukūʻai o ka maʻalahi.

CPLD Architecture

Hiki ke noʻonoʻo ʻia ʻo CPLD ma ke ʻano he hoʻololi o PAL a loaʻa i nā hale PAL lehulehu i kapa ʻia ʻo macrocells.I loko o ka pūʻolo CPLD, loaʻa nā pine hoʻokomo a pau i kēlā me kēia macrocell, ʻoiai ua loaʻa i kēlā me kēia macrocell kahi pine puka hoʻolaʻa.

Mai ke kiʻikuhi poloka, hiki iā mākou ke ʻike i kahi CPLD he mau macrocells a i ʻole nā ​​poloka hana.Hoʻopili ʻia nā macrocells ma o kahi pilina programmable, i kapa ʻia ʻo GIM (global interconnection matrix).Ma ka hoʻonohonoho hou ʻana i ka GIM, hiki ke hoʻokō ʻia nā ʻāpana logic like ʻole.Hoʻopili nā CPLD me ka honua o waho me ka hoʻohana ʻana i nā I/O kikohoʻe.

ʻO ka ʻokoʻa ma waena o CPLD a me FPGA

I nā makahiki i hala iho nei, ua kaulana loa nā FPGA i ka hoʻolālā ʻana i nā ʻōnaehana kikohoʻe programmable.Nui nā mea like a me nā ʻokoʻa ma waena o CPLD a me FPGA.No nā mea like, ʻelua nā polokalamu logic programmable i loaʻa i nā arrays gate logic.Hoʻolālā ʻia nā mea ʻelua me ka hoʻohana ʻana i nā HDL e like me Verilog HDL a i ʻole VHDL.

ʻO ka ʻokoʻa mua ma waena o CPLD a me FPGA aia i ka helu o nā puka.Loaʻa i kahi CPLD he mau kaukani mau puka logic, ʻoiai ka helu o nā puka i kahi FPGA hiki ke hiki i nā miliona.No laila, hiki ke hoʻokō ʻia nā kaapuni paʻakikī a me nā ʻōnaehana me ka hoʻohana ʻana i nā FPGA.ʻO ka lalo o kēia paʻakikī he kumukūʻai kiʻekiʻe.No laila, ʻoi aku ka maikaʻi o nā CPLD no nā noi liʻiliʻi liʻiliʻi.

ʻO kekahi ʻokoʻa koʻikoʻi ma waena o kēia mau mea ʻelua, ʻo ia ka CPLD i kahi EEPROM non-volatile i kūkulu ʻia (electrically erasable programmable random-access memory), aʻo FPGAs kahi hoʻomanaʻo hoʻomanaʻo.Ma muli o kēia, hiki i kahi CPLD ke hoʻopaʻa i kāna mau mea i ka wā i hoʻopau ʻia, ʻoiai ʻaʻole hiki i kahi FPGA ke mālama i kāna ʻike.Eia kekahi, ma muli o ka hoʻomanaʻo non-volatile i kūkulu ʻia, hiki i kahi CPLD ke hoʻomaka i ka hana ma hope koke o ka mana.ʻO ka hapa nui o nā FPGA, ma ka ʻaoʻao ʻē aʻe, koi i kahi bit-stream mai kahi hoʻomanaʻo non-volatile waho no ka hoʻomaka ʻana.

Ma ke ʻano o ka hana, loaʻa i nā FPGA kahi lohi kaʻina hana hōʻailona ma muli o ka hoʻolālā paʻakikī i hui pū ʻia me ka papahana maʻamau o ka mea hoʻohana.Ma nā CPLD, ʻoi aku ka liʻiliʻi o ka lohi pin-to-pin ma muli o ka hoʻolālā maʻalahi.ʻO ka lohi kaʻina hana hōʻailona he mea koʻikoʻi i ka hoʻolālā ʻana i nā noi palekana-koʻikoʻi a hoʻokomo ʻia i ka manawa maoli.

Ma muli o nā alapine hana kiʻekiʻe a me nā hana loiloi paʻakikī, hiki i kekahi mau FPGA ke hoʻopau i ka mana ma mua o nā CPLD.No laila, he mea koʻikoʻi ka hoʻokele wela i nā ʻōnaehana FPGA.Ma muli o kēia kumu, hoʻohana pinepine nā ʻōnaehana hoʻokumu FPGA i ka wela wela a me nā mea hoʻoluʻu hoʻoluʻu a makemake i nā lako mana nui a paʻakikī a me nā pūnaewele hoʻolaha.

Mai kahi ʻike palekana ʻike, ʻoi aku ka palekana o nā CPLD i ka wā i kūkulu ʻia ai ka hoʻomanaʻo i loko o ka chip ponoʻī.ʻO ka mea ʻē aʻe, ʻo ka hapa nui o nā FPGA e koi i ka hoʻomanaʻo non-volatile waho, hiki ke lilo i mea hoʻoweliweli palekana data.ʻOiai aia nā algorithm encryption data i nā FPGA, ʻoi aku ka palekana o nā CPLD i ka hoʻohālikelike ʻana i nā FPGA.

Nā noi o CPLD

Loaʻa nā CPLD i kā lākou noi i nā mana kikohoʻe haʻahaʻa haʻahaʻa paʻakikī a me nā kaʻa kaʻa hana hōʻailona.ʻO kekahi o nā noi koʻikoʻi:

  1. Hiki ke hoʻohana ʻia nā CPLD ma ke ʻano he bootloaders no nā FPGA a me nā ʻōnaehana programmable ʻē aʻe.
  2. Hoʻohana pinepine ʻia nā CPLD e like me nā decoders address a me nā mīkini mokuʻāina maʻamau i nā ʻōnaehana kikohoʻe.
  3. Ma muli o ko lākou liʻiliʻi liʻiliʻi a me ka hoʻohana haʻahaʻa haʻahaʻa, kūpono nā CPLD no ka hoʻohana ʻana i ka portable apaʻa limanā mea kikohoʻe.
  4. Hoʻohana pū ʻia nā CPLD i nā noi hoʻomalu koʻikoʻi palekana.

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