XCZU19EG-2FFVC1760E 100% hou a me ka mea hoʻololi DC i ka DC a me ka hoʻololi ʻana i ka mea hoʻoponopono Chip
Huahana Huahana
| Huahana Huahana | Waiwai Hiʻona |
| Mea hana: | Xilinx |
| Māhele Huahana: | SoC FPGA |
| Kaohi ʻana o ka moku: | Pono paha kēia huahana i nā palapala hou e hoʻokuʻu aku mai ʻAmelika Hui Pū ʻIa. |
| RoHS: | Nā kikoʻī |
| Kāila kau ʻana: | SMD/SMT |
| Pūʻolo / hihia: | FBGA-1760 |
| kumu: | ARM Cortex A53, ARM Cortex R5, ARM Mali-400 MP2 |
| Ka helu o nā Core: | 7 Core |
| ʻO ke alapine o ka uaki kiʻekiʻe: | 600 MHz, 667 MHz, 1.5 GHz |
| L1 Cache Instruction Memory: | 2 x 32 kB, 4 x 32 kB |
| L1 Cache Data Memory: | 2 x 32 kB, 4 x 32 kB |
| Ka nui memo o ka papahana: | - |
| Nui ʻikepili RAM: | - |
| Ka helu o nā Elements Logic: | 1143450 LE |
| Nā Module Logic Adaptive - ALM: | 65340 ALM |
| Hoʻomanaʻo i hoʻokomo ʻia: | 34.6 Mbit |
| Voltage lako hana: | 850 mV |
| Mahana hana liʻiliʻi loa: | 0 C |
| ʻO ka wela hoʻohana kiʻekiʻe loa: | + 100 C |
| Brand: | Xilinx |
| Hoʻolaha ʻia ka RAM: | 9.8 Mbit |
| Pākaʻi RAM - EBR: | 34.6 Mbit |
| ʻAi ʻoluʻolu: | ʻAe |
| Ka helu o nā poloka Lahui Logic - LABs: | 65340 LAB |
| Ka helu o nā mea lawe uila: | 72 Lawelawe |
| ʻAno Huahana: | SoC FPGA |
| moʻo: | XCZU19EG |
| Ka nui o ka waihona hale hana: | 1 |
| Māhele ʻāpana: | SOC - Nā Pūnaehana ma kahi Chip |
| inoa kalepa: | Zynq UltraScale+ |
ʻAno Kaapuni Hoʻohui
Ke hoʻohālikelike ʻia me nā electrons, ʻaʻohe nui o nā kiʻi paʻi paʻa, ka launa pū ʻana nāwaliwali, ka ikaika anti-interference ikaika, a ʻoi aku ka maikaʻi no ka lawe ʻana i ka ʻike.Manaʻo ʻia ʻo Optical interconnection e lilo i ʻenehana koʻikoʻi e wāwahi i ka pā hoʻohana mana, ka paia mālama a me ka pā kamaʻilio.Hoʻohui ʻia nā mea hoʻomālamalama, coupler, modulator, waveguide i nā hiʻohiʻona optical density kiʻekiʻe e like me ka photoelectric integrated micro system, hiki ke hoʻomaopopo i ka maikaʻi, ka nui, ka hoʻohana ʻana i ka mana o ka hoʻohui photoelectric kiʻekiʻe, photoelectric integration platform me III - V compound semiconductor monolithic integrated (INP). ) kahua hoʻohui passive, silicate a i ʻole aniani (planar optical waveguide, PLC) platform a me ke kahua silicon-based.
Hoʻohana nui ʻia ka InP platform no ka hana ʻana i ka laser, modulator, detector a me nā mea hana ʻē aʻe, haʻahaʻa ʻenehana haʻahaʻa, kiʻekiʻe ke kumu kūʻai substrate;Ke hoʻohana nei i ka PLC platform e hana i nā ʻāpana passive, haʻahaʻa haʻahaʻa, leo nui;ʻO ka pilikia nui loa me nā paepae ʻelua, ʻaʻole kūpono nā mea me ka uila uila.ʻO ka pōmaikaʻi koʻikoʻi o ka hoʻohui kiʻi kiʻi kiʻi kiʻekiʻe, ʻo ia ke kūpono o ke kaʻina hana me ke kaʻina CMOS a ua haʻahaʻa ke kumukūʻai hana, no laila ua manaʻo ʻia ʻo ia ka optoelectronic hiki loa a hiki i nā mea āpau-optical integration scheme.
ʻElua mau ala hoʻohui no nā mea kiʻi kiʻi kiʻi kiʻekiʻe a me nā kaapuni CMOS.
ʻO ka pōmaikaʻi o ka mua, ʻo ia ka hiki ke hoʻokaʻawale ʻia nā mea photonic a me nā mea uila, akā paʻakikī ka paʻi hope a ua kaupalena ʻia nā noi pāʻoihana.He paʻakikī ka mea hope i ka hoʻolālā ʻana a me ka hana ʻana i ka hoʻohui ʻana o nā mea ʻelua.I kēia manawa, ʻo ka hui hybrid e pili ana i ka hoʻohui ʻana i ka nuklea ka koho maikaʻi loa











