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 ʻO kahi mea hoʻopalekana programmable logic device (CPLD) he mea hoʻonaʻauao me nā papa kuhikuhi AND/OR a me nā macrocells.ʻO Macrocells ka papa kūkulu hale nui o kahi CPLD, aia nā hana loiloi paʻakikī a me nā loina no ka hoʻokō ʻana i nā ʻōlelo maʻamau disjunctive.Hiki ke hoʻonohonoho hou ʻia nā arrays AND/OR a kuleana no ka hana ʻana i nā hana loiloi like ʻole.Hiki ke wehewehe ʻia nā Macrocells he mau poloka hana i kuleana no ka hoʻokō ʻana i ka loina sequential a i ʻole combinatorial logic.

 ʻO kahi polokalamu loiloi polokalamu paʻakikī he huahana hou i hoʻohālikelike ʻia me nā polokalamu loiloi mua e like me programmable logic arrays (PLAs) a me Programmable Array Logic (PAL).ʻAʻole hiki ke hoʻolālā ʻia nā polokalamu loiloi mua, no laila ua kūkulu ʻia ka loiloi ma ka hoʻohui ʻana i nā ʻāpana logic lehulehu.He paʻakikī ka CPLD ma waena o nā PAL a me nā papa kuhikuhi puka pā-programmable (FPGA).Loaʻa iā ia nā hiʻohiʻona hoʻolālā o nā PAL a me nā FPGA.ʻO ka ʻokoʻa koʻikoʻi ma waena o kahi CPLD a me FPGA ʻo ia ka FPGA e pili ana i nā papa ʻimi, aʻo nā CPLD e pili ana i ka moana-o-puka.

ʻO nā hiʻohiʻona maʻamau o nā CPLD a me nā FPGA ʻo ia ka nui o nā ʻīpuka a me nā mea maʻalahi no ka loiloi.ʻOiai nā hiʻohiʻona maʻamau ma waena o nā CPLD a me nā PAL me ka hoʻomanaʻo hoʻonohonoho non-volatile.He alakaʻi nā CPLD i ka mākeke o nā polokalamu logic programmable, loaʻa nā pōmaikaʻi he nui e like me ka hoʻolālā kiʻekiʻe, ke kumu kūʻai haʻahaʻa, ʻaʻole paʻakikī a maʻalahi hoʻi e hoʻohana.

 Amea paʻakikī programmable logic(CPLD) he amea hoʻonaʻauao polokalamume ka paʻakikī ma waena o kēlā oPALsaNā FPGA, a me nā hiʻohiʻona hale o nā mea ʻelua.ʻO ka papa hana nui o ka CPLD hemacrocell, i loaʻa i ka hoʻokō loiloiʻano maʻamau disjunctivenā ʻōlelo a me nā hana loiloi kūikawā.

Nā hiʻohiʻona[hoʻoponopono]

ʻO kekahi o nā hiʻohiʻona CPLD ua like pū mePALs:

• Hoʻomanaʻo hoʻonohonoho non-volatile.ʻAʻole like me nā FPGA he nui, kahi hoʻonohonoho wahoROMʻaʻole koi ʻia, a hiki i ka CPLD ke hana koke i ka hoʻomaka ʻana o ka ʻōnaehana.
• No nā mea hoʻoilina CPLD he nui, ke kaohi ʻana i ka hapa nui o nā poloka logic e loaʻa nā hōʻailona hoʻokomo a me nā hōʻailona hoʻopuka e pili ana i nā pine waho, e hōʻemi ana i nā manawa no ka mālama ʻana i ka mokuʻāina a me nā loina hohonu.ʻAʻole kēia he kumu no nā CPLD nui a me nā ʻohana huahana CPLD hou.

Ua like nā hiʻohiʻona ʻē aʻe meNā FPGA:

• Nui nā puka i loaʻa.Loaʻa i nā CPLD ka like o nā tausani a me nā ʻumi kaukani oʻīpuka manaʻo, e ʻae ana i ka hoʻokō ʻana i nā mea hana ʻikepili paʻakikī.Loaʻa i nā PAL he mau haneli mau haneli like ka nui, aʻo nā FPGA maʻamau mai nā ʻumi kaukani a i nā miliona.
• ʻOi aku ka maʻalahi o kekahi mau ʻōlelo no ka loiloihuina-o-huahananā ʻōlelo, me nā ala pane paʻakikī ma waena o nā cell macro, a me nā loiloi kūikawā no ka hoʻokō ʻana i nā hana maʻamau, e like meinteger helu helu.

ʻO ka ʻokoʻa i ʻike ʻia ma waena o kahi CPLD nui a me kahi FPGA liʻiliʻi ʻo ia ka loaʻa ʻana o ka hoʻomanaʻo non-volatile on-chip i ka CPLD, e hiki ai ke hoʻohana ʻia nā CPLD no "mea hoʻouka kāmaʻa”, ma mua o ka hāʻawi ʻana i ka mana i nā mea hana ʻē aʻe ʻaʻole i loaʻa i kā lākou waihona polokalamu mau.ʻO kahi laʻana maikaʻi kahi e hoʻohana ʻia ai kahi CPLD e hoʻouka i ka ʻikepili hoʻonohonoho no kahi FPGA mai ka hoʻomanaʻo non-volatile.^[1]

ʻokoʻa[hoʻoponopono]

ʻO nā CPLD kahi hana evolutionary mai nā mea liʻiliʻi aʻe ma mua o lākou,PLA(ua hoʻouna mua ʻia eNā hōʻailona), aPALs.ʻO kēia mau mea ma mualoina maʻamaunā huahana, i hāʻawi ʻole i ka programmability a ua hoʻohana ʻia no ke kūkulu ʻana i nā hana loiloi ma o ka hoʻopaʻa kino ʻana i kekahi mau ʻāpana logic maʻamau (a i ʻole nā ​​haneli o lākou) pū (me ka maʻamau me ka wili ma ka papa kaapuni paʻi a i ʻole nā ​​​​papa, akā i kekahi manawa, no ka prototyping, me ka hoʻohana ʻana.wili uweawiring).

ʻO ka ʻokoʻa nui ma waena o FPGA a me CPLD hale kūkulu hale ʻo ia ka CPLD i hoʻokumu ʻia i lokonā papa nānā(LUT) i ka wā e hoʻohana ai nā FPGApoloka logic.