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Huahana Huahana

Ua ʻae ʻo Kina i ka loaʻa ʻana o AMD iā Xilinx me 5 mau kūlana!

Ma ka lā 27 ʻOkakopa 2020, ua hoʻolaha ʻo AMD e loaʻa iā Xilinx (Xilinx) no US $ 35 biliona ma kahi ʻāpana kūʻai āpau.ʻO ka ʻaelike, ʻoiai i ʻae ʻia e nā papa alakaʻi o nā ʻaoʻao ʻelua, pono e ʻae ʻia e nā mea kuleana o nā ʻaoʻao ʻelua, me ka ʻae hoʻoponopono ʻana mai nā ʻāina like ʻole, ʻo ia hoʻi, ʻo Kina.

I kēia mau lā, ua hoʻolaha ka Anti-Monopoly Bureau of China's State Administration of Market Supervision and Administration i ka hoʻoholo e ʻae i ka loiloi anti-monopoly o ka loaʻa ʻana o kahi stake ma Xilinx e Chaowei Semiconductor Corporation me nā kūlana paʻa hou (ka "Announcement"), e ʻae ana. ka loaʻa ʻana o Xilinx e AMD a hoʻomaʻemaʻe i ka hoʻoponopono hoʻoponopono hope loa no ka loaʻa.

Wahi a ka Hoʻolaha, ma hope o hoʻokahi makahiki o ka loaʻa ʻana o ka anti-monopoly declaration of operator concentrate i ka hihia o ka loaʻa ʻana o AMD iā Xilinx ma Ianuali 19, 2021, a waiho i ka hihia ma hope o ka mea noi i hoʻohui i kāna mau mea hoʻolaha, ka General Administration of Market Regulation. (GAMR) ua hoʻoholo e ʻae i ka hihia me nā kūlana paʻa.

Ua ʻae ʻia ka hui ʻana, akā ʻaʻole kūʻai pū ʻia a hoʻokae paha i nā mea kūʻai aku Kina

He mea nui e hoʻomaopopo i ka loaʻa ʻana me nā hana ma waena o nā palena e koi i ka ʻae kānāwai mai kekahi mau mea hoʻoponopono mākeke koʻikoʻi a puni ka honua.Ma mua, ua hoʻopau ka US, UK, a me EU i ka loaʻa ʻana, a i kēia manawa ua ʻae ʻo Kina i ka hihia, ʻo ia ka mea e hiki ai iā AMD ke hoʻopau i kāna mau hoʻolālā kūʻai i ka hapaha mua o 2022.

Pono e hoʻomaopopo ʻia, ʻo ka ʻae ʻia ʻana o ka loaʻa ʻana o ka AMD iā Xilinx e ka Chinese General Administration of Market Regulation e hele mai me nā kūlana paʻa hou, e koi ana i nā ʻaoʻao ʻelua i ke kālepa a me ka hui post-concentration e hoʻokō i kēia mau kuleana.

(i) Ke kūʻai aku nei i nā CPU SuperPower, nā SuperPower GPU, a me nā Celeris FPGA i ka mākeke ma Kina, ʻaʻole lākou e koi i ke kūʻai paʻa ʻana a i ʻole e hoʻopili i nā kūlana kālepa kūpono ʻole;ʻaʻole lākou e pale a hoʻopaʻa i nā mea kūʻai mai ke kūʻai a hoʻohana ʻana i nā huahana ma luna;ʻAʻole lākou e hoʻokae i nā mea kūʻai aku e kūʻai aku i nā huahana i luna ma ke ʻano o ka pae lawelawe, ke kumu kūʻai, nā hiʻohiʻona polokalamu, etc.

(b) Hoʻoikaika hou i ka launa pū ʻana e pili ana i ka launa pū ʻana me nā ʻoihana ma Kina a hoʻomau i ka hoʻolako ʻana i nā CPU Chaowei, Chaowei GPUs, Xilinx FPGAs, a me nā lako polokalamu a me nā lako e pili ana i ka mākeke ma Kina ma muli o nā loina o ka pololei, kūpono, a me ka ʻole. hoowahawaha.

(iii) E hōʻoia i ka maʻalahi a me ka programmability o nā Xilinx FPGAs, e hoʻomau i ka hoʻomohala ʻana a me ka hōʻoia i ka loaʻa ʻana o ka laina huahana Xilinx FPGA, a e hōʻoia i ka hoʻomohala ʻia ʻana ma ke ʻano kūpono me nā mea hana ARM-based a e like me nā hoʻolālā o Xilinx ma mua o ka Transaction .

(iv) hoʻomau e hōʻoia i ka interoperability o Chaowei CPU, Chaowei GPU a me Celeris FPGA i kūʻai ʻia i ka mākeke ma Kina me nā CPU ʻaoʻao ʻekolu, GPU a me FPGA;ʻaʻole e emi ka pae o ka interoperability i luna ma mua o ka pae o ka interoperability o Chaowei CPU, Chaowei GPU a me Celeris FPGA;ʻO ka ʻike, nā hiʻohiʻona, a me nā laʻana e pili ana i ka hoʻonui interoperability e hāʻawi ʻia i ka ʻaoʻao ʻekolu i loko o 90 mau lā ma hope o ka hoʻonui ʻana i ka CPU, GPU, a me nā mea hana FPGA.

(v) E hana i nā hana e pale ai i ka ʻike o nā mea hana CPU, GPU, a me FPGA ʻaoʻao ʻekolu a komo i loko o nā ʻaelike hūnā me nā mea hana CPU, GPU, a me FPGA ʻaoʻao ʻekolu;e mālama i ka ʻike huna o ka ʻaoʻao ʻekolu o ka CPU, GPU, a me nā mea hana FPGA i nā ʻōnaehana lako kaʻawale a kūʻokoʻa.